1. Field of the Invention
The present invention relates to a semiconductor device having laminated semiconductor constructions and a manufacturing method thereof.
2. Description of the Related Art
A conventional semiconductor device where multiple semiconductor chips are laminated on the center of an upper surface of a circuit substrate and integrally packaged in order to reduce an area for mounting is known. This type of semiconductor device is described in the Publication of Japanese Patent Application Laid-Open No. 2004-111656. In this publication, upper side semiconductor chips are mounted to expose the connection pads of the semiconductor chips arranged at the lower side. In addition, the connection pads arranged around the periphery of each semiconductor chip and the connection pads arranged around the upper surface of the periphery of the circuit substrate are connected by bonding wire.
However, in the conventional semiconductor device, in order to enable the wire bonding of the semiconductor chips at the lower side, the size of the upper side semiconductor chips is smaller than that of the lower side semiconductor chips. As a result, the arrangement position of the connection pads arranged around the upper surface periphery of the upper side semiconductor chips is inside that of the connection pads arranged around the upper surface periphery of the lower side semiconductor chips. Further, because wire bonding is accomplished on the upper side semiconductor chips after being accomplished on the lower side semiconductor chips, the connection pads for the lower side semiconductor chips are arranged outside of the arrangement region of the lower side semiconductor chips on the upper surface of the circuit substrate and the connection pads for the upper side semiconductor chips are arranged outside of the lower side semiconductor chips.
As described above, in the conventional semiconductor device, because the connection pads for the lower side semiconductor chips are arranged outside of the arrangement region of the lower side semiconductor chips on the upper surface of the circuit substrate and the connection pads for the upper side semiconductor chips are arranged outside of the connection pads for the lower side semiconductor chips, the area of the circuit substrate, i.e. the area of the semiconductor device becomes comparatively larger and there is the problem that the area for mounting cannot be reduced very much.
Further, the distance between the connection pad of the upper side semiconductor chip and the connection pad for the upper side semiconductor chip on the circuit substrate becomes comparatively longer and in proportion to which the length of bonding wire for connecting both the connection pads is increased. When the diameter of bonding wire made of gold becomes comparatively larger, the cost becomes more expensive. As a result, the diameter of the bonding wire is comparatively small under normal conditions. Therefore, the inductance or impedance becomes greater and the device will not be suitable for high frequency.